**The AND Function**

**This function performs a product so for a 2 input AND gate the output will be input one times input two. The representation of an AND gate is:**

The truth table is:

A B O

0 0 0

0 1 0

1 0 0

1 1 1

From this table it is clear that the and function is actually a*b. The output will be 1 only when all the inputs are 1. AND is also a minimum function because the output is the minimum value of the inputs or min(A,B).

**The OR function**

**OR is a maximum function because the output will have the biggest value of all the inputs. For an n input OR function, if n-1 inputs are 0 and only one is 1 then the output will be 1.**

Representation of an OR gate:

The truth table is:

A B O

0 0 0

0 1 1

1 0 1

1 1 1

So we see that the output is 0 only when there isn't a 1 at the input.

**The XOR function**

**XOR is short for exclusive OR The output is 1 only when an input is 1 and the other is 0. This function is very useful when detecting parity for example.**

Representation of XOR:

The truth table is:

A B O

0 0 0

0 1 1

1 0 1

1 1 0

**Inverter (NOT)**

**It is a very important circuit. It takes an input and inverts it's value at the output. So 0 becomes 1 and 1 becomes 0.**

The symbol for the inverter is:

**Other functions**

**There are 3 more functions to mention: nand, nor, xnor. These are exactly like and, or, xor but the output is inverted. The symbols are also almost the same. The difference is that these have a small circle at the output side. For example the NAND gate looks like this:**

If you do some project that requires one of these 3 gates but you don't have it, use the non-inverted gate plus an inverter circuit.

**Using all the gates in a project**

**Let's make a circuit that takes 2 inputs: a and b. The circuit will have 8 outputs: a and b, a or b, a xor b, a nand b, a nor b, a xnor b, not a, not b. For a and b we will use 2 slide switches and for the outputs 8 LEDs.**

If you don't remember how to use Xilinx ISE you can read my tutorial about starting a project:Link.

Let's make the entity. It should be like this:

You don't have to use the same names for the entity or I/O of course. Also you can use a 2 element std_logic_vector for the inputs and an 8 element std_logic_vector for the outputs f you want.

Now it's time to write the code. It should look like this:

Small reminder: The order in witch you put the statements doesn't count because in the architecture all the statements are concurrent.

Now you can put in the constraints and implement the project.

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