Introduction to VHDL

    In order to use an FPGA, you of course have to program it first to do something. For this task we need a Hardware Description Language or HDL. There are 2 primary HDLs around:
       -VHDL
       -Verilog
    In my tutorials I will be using VHDL. At least for now.

    VHDL compared with programming languages
    If you look at VHDL code you will be tempted to think that it is a computer programming language at first glance.In fact the only things it shares with a standard programming language like C or Pascal are some constructs like loops (for, while) and the general sintax with lines ended in semicolons and blocks encased in begin and end statements.

    The differences between VHDL and programming languages are it's strong point. Firstly it is by nature a concurent language. So if we have 2 or more concurent blocks of code in a program then they will be executed at the same time, as opposed to C statements witch are sequential. For example a VHDL program with these two lines: A<=B; and B<=A; (witch mean A=B,B=A) will execute does instructions concurently. So A and B will swap values. In a C program if we had A=B; and B=A; you would lose A's value.
    Another big difference is that VHDL not only lets you describe circuits, but it has timing constructs that let you simulate them on the computer first.

    The basic structure of a VHDL program
    The minimum components are:

       -Library inclusion: similar to thoes used in programming languages; we need to include libraries in order to use certain functions or data types in a program
       -Entity declaration: this part is important because we define the input and output ports of our circuit and their data types. Based on the entity we can make a diagram of the designed hardware, but we don't know yet the functionality of it. So you can think of entities like black boxes. Example of entity declaration and diagram (ignore the data types because they will be explained in another tutorial):


                     entity andgate is
                     port(
                               a : in std_logic;
                               b : in std_logic;
                               o : out std_logic);
                     end entity andgate;

       -Architecture: the main part of the program where we specify how the circuit works. It includes concurent blocks. The blocks can have sequential instructions inside them.