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Monday, October 21, 2013

Eliminate clock gating when using multiple divided clocks





       Hi everyone. This post is just an update for 2 older posts of mine: Blinking a LED at different intervals and VHDL project using schematic view.
       While these tutorials work as they should, they have a problem: the clock gating warning. If you are serious about working in this field you have to know that this warning is not permitted at a professional level design. So this tutorial is meant to show you how you can avoid this problem.
       Important: this post treats multiplexing multiple clocks that are divided from the same source (so they are synchronous).
       Please read the 2 articles before checking the solution because I will not put any code here.

       OK. let's discuss the solution. In the previous posts I multiplexed 4 clock signals and the result was connected to the clock port of the LED driver. That is not good because it will create gates through which the clock signal passes and may introduce clock skew and other problems that may or may not be felt during function of the circuit.
       The fix is really simple: the only modification is made to the LED driver and it consists of adding another input (enable). So now the driver will change the state of the led when clk is '1' and when the enable signal is also '1'. OK but what connects to enable?? As you can see from the image below the divided clock connects to enable and the global clock connects to clk. This way the divided clock is not treated as a clocking signal thus eliminating the gating problem.

       Modify the driver circuit by placing an if that checks fro enable if reset is not pressed. So instead of the else after the reset check, put in this line:
              elsif(en='1') then

       The full circuit is now:
     


       Thakns a lot for reading and I hope this has been helpful. For questions please contact me at fpgatutorials@gmail.com

4 comments:

  1. hey nice information for us,thanks for sharing the nice information and you upload pics that shows the nice information and i really like your posting and i have definitely bookmark this blog..

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    Replies
    1. Hi. Thanks for the appreciation. I saw your site. You guys have a lot of interesting projects

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  2. Hi,
    thanks for the tutorials. I think you should write more FPGA tutorials and update your blog

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